※應徵本職缺經審核通過者，將邀約出席11/1(五) 媒合會現場面談，本實體活動為桃園市政府青年事務局之專案活動 1. Switch/x86硬體線路研發及設計 2. Switch/x86硬體相關測試驗證與除錯 3. PCB layout佈局與走線確認 4. 訊號量測與儀器操作
工作內容： 1.Windows AD與Domino Notes郵件系統管理。 2.建置、管理與維護企業各公司網路設備。 3.執行企業資訊安全政策與資料備份 4.使用者軟硬體故障問題排除與技術支援。 5.協助Notes系統測試上線與執行訓練課程 6.協助執行資訊資源需求與編制年度採購預算 7.其他主管交辦事項。
[關於這份工作] 電子電路硬體設計、IC 功能驗證、測試程式與治具、及電子電路之控制程式設計開發。歡迎對於電子電路之設計有興趣之開發者，並樂於團隊合作、對於探索新技術與驗證有高度興趣與熱誠之人員加入。 [條件要求] 無工作經驗可，電子、電機等相關理工大學以上畢業。 必須具備 1. C 或組合語言 語言程式設計 2. 熟悉電子、電路設計 3. 良好的溝通表達與邏輯推理能力 具下列經驗至少其中一者尤佳 1. Verilog 及FPGA 程式設計 2. 熟SPICE 電路模擬 3. 熟示波器、邏輯分析儀、訊號產生器等基礎儀器之使用 4. 熟 EMC 相關測試與除錯
Please apply this role from our career site with English resume attached: https://qualcomm.wd12.myworkdayjobs.com/External/job/Hsinchu-City-TWN/Central-Hardware-Systems---EE-Automation-Engineer_3065024 Thank you. =============================================== We have an opening for an electrical engineer to provide internal automation, scripting development, and its ongoing maintenance and support for the high frequency SI/PI tools used across organization for the simulation and extractions of the Packages and PCBs layouts. The successful candidate will become a key member of the CHSA electrical team (Central Hardware Systems Automation) responsible for developing process automations, tool methodology support, project consulting for the Qualcomm's substantial EDA RF/SI tools portfolio users. • The Candidate will be working within a global team of experienced EDA support engineers and will drive Automation and Troubleshooting related solutions to the design flows. • Working effectively across organizational boundaries with good communication and quick understanding of the requirements and the issues is essential along with effective Documentation and Presentation skillsets. • Candidate would need to support RF/SI design flows using the Commercial and Custom tools to support PCB and PKG Signal Integrity engineers. • The CHSA Electrical tools portfolio includes Cadence Sigrity, Siemens-Mentor, Ansys, Keysight, CST and Polar. • Candidate is expected to provide electrical modeling support to engineers performing analysis of PCBs, various IC Packages, on-chip interconnects to ensure design success. • The candidate will engage with PCB SI Engineers, Electrical Package Modeling Engineers, and on a limited basis with IC designers to find solutions and provide recommendations for optimal modeling and extraction techniques. • The work will also include installation of Applications in Windows & Linux OS, KB articles for developed simulation flows. 【Minimum Qualifications】 Minimum of bachelor’s degree in electrical engineering with 2+ years of experience for the SI, EM Toolset. Usage/Support with 2+ years’ experience in Development & Debugging techniques using Python, VB Scripting, Perl, C, C++ etc. 【Preferred Qualifications】 • Prior strong Experience in RF/SI Software Applications like Cadence Sigrity, Siemens, Keysight, Agilent, Ansys, Dassault • Exposure to Circuit solvers such as Agilent ADS or AWR, Full-wave EM solvers such as HFSS, Clarity, CST Microwave Studio, PowerSI or SIWave • LPDDR design and analysis High speed serial IO Design and Analysis • Programming skills in Python, Perl, C, C++ or similar languages in additional to primary subject knowledge of SI is essential. • Spreadsheets and similar productivity tools, including scripting VNA or TDR based high frequency measurements. • Strong problem solving/ debugging skills. • Effectively communicates with project peers and engineering personnel via e-mail, web meetings, and instant messaging including status reports and illustrative presentation slides. • Leadership skills to help direct, prioritize, and clearly set project tasks per schedule. • Communicate milestones and directions to outside team members. • Good verbal and written communication skills Educational Requirements • Minimum of bachelor’s degree in electrical engineering with equivalent experience • Master's degree is preferred on Electromagnetic theory and Transmission lines, Basic signal and power integrity concepts. Keywords • ADS, Sigrity, HFSS, Clarity, Signal Integrity (SI) Power Integrity (PI), RF, Python, PDN, PCIe, DDR, SerDes
信號完整性分析: High-speed, ex: PCIe, SATA, 10G, 25G, 400G, 800G, 1.6T+ 分析整個通道的時域與頻域是否能滿足協會與晶片的規範，如IL、RL、Crosstalk、TDR、Eye Diagram、BER、COM、ERL、VEC、VEO Low-speed, ex: I2C, I3C, SPI, MDC/MDO, CLK, UART 分析整個通道接收端波型是否能滿足協會與晶片的規範，如ViH、ViL、Tlow、Thigh、Rising/Falling time DDRx 分析DATA/ADD/CLK是否能滿足協會的規範，如Setup/Hole time, Slew rate, Peak voltage, Overshoot/undershoot, Vix, tDSS, tDSH 電源完整性分析: DC PI: 電源/接地層設計、佈局前平面規劃、佈局後最佳化 AC PI: PDN去耦電容器設計與最佳化、ASIC 類比電源濾波、包含CPM的瞬態分析
1. 硬體產品電路設計、偵錯與問題排除。 2. 產品技術研討及開發及相關作業主導。 3. 產品規格書、測試驗證報告與技術文件的撰寫並應提供客戶服務。 4. 其他主管交辦事項。
1. SRAM or DRAM array circuit design 2. Full custom design (Nice to have) * Serial-to-parallel, parallel-to-serial digital circuits * High-speed DDR/LPDDR PHY design and verification * Analog references, regulator, charge pumps, oscillators * Ultra-low power analog/mixed-signal circuit techniques * Full-chip integration of Analog sub-systems in memory design flow
[Responsibilities] 1. Apply current functional verification techniques to perform and improve pre-silicon IP verification quality and product Time to Market for ASIC/SOC design. 2.Involve technically in the porting/creation of the DV environment for the new design, block and IP level test plan creation and implementation, coverage analysis, and regression cleanup. [Required Qualifications] 1.Over 6 years of digital IP verification with SV/UVM/Formal Verification or new methodology of the industry. 2.Good experiences with simulation model creation and testbench build (better with UVM) 3.Good logical thinking and expression. Can describe a technical issue/topic to audience not familiar with it. 4.Good cooperation cross teams. 5.It’s a plus if have one or more of the following experience/knowledge, such as X86/ARM/8051 architecture, AMBA(AXI/AHB/APB) bus, PCIe protocol. 6.It’s a plus if have f/w writing and debug experience or experience to co-work with f/w team for f/w sequence define in embedded design. 7.It’s a plus to be good at some script language, such as Perl, python. Or some database experience (for IP technical info maintain).
Minimum qualifications: • Bachelor’s degree or equivalent practical experience. • 5 years of experience with software development in one or more programming languages, and with data structures/algorithms. • 3 years of experience in developing software products, and 1 year of experience with software design and architecture. Preferred qualifications: • Experience with device or middleware software development. • Experience with Video/Media Streaming and playback. • Experience with audio post processing or android media framework. • Problem solving experience and knowledge. • Ability to collaborate with cross-functional teams. About the job Google's software engineers develop the next-generation technologies that change how billions of users connect, explore, and interact with information and one another. Our products need to handle information at massive scale, and extend well beyond web search. We're looking for engineers who bring fresh ideas from all areas, including information retrieval, distributed computing, large-scale system design, networking and data storage, security, artificial intelligence, natural language processing, UI design and mobile; the list goes on and is growing every day. As a software engineer, you will work on a specific project critical to Google’s needs with opportunities to switch teams and projects as you and our fast-paced business grow and evolve. We need our engineers to be versatile, display leadership qualities and be enthusiastic to take on new problems across the full-stack as we continue to push technology forward. At Google Nest, our mission is to enable helpful homes by building products that bring the best of Google to the home. In this role, you will work on software features on Speaker products, specifically on showcase of premium experience (e.g., Media, Voice, Smart Home) to user, and leverage Google ecosystem and make Google first-party products Better Together.You will be working closely with Technical Leads to enable premium experience on next generation Speakers. Google's mission is to organize the world's information and make it universally accessible and useful. Our Devices & Services team combines the best of Google AI, Software, and Hardware to create radically helpful experiences for users. We research, design, and develop new technologies and hardware to make our user's interaction with computing faster, seamless, and more powerful. Whether finding new ways to capture and sense the world around us, advancing form factors, or improving interaction methods, the Devices & Services team is making people's lives better through technology. Responsibilities • Participate in a full development cycle by cross-functional team collaboration with Engineering, Product Management, UX, and Engineering Productivity. • Continue to improve Media playback experience via Cast/Bluetooth. • Leverage on-device compute in the home for latency and offload purposes. Improve far-field experience by leveraging LLM technology. • Innovate smart home experience by leveraging Google Home Platform. • Innovate helpful features in Speakers and other Google first-party products (e.g. Pixels).
Minimum qualifications: • Bachelor's degree or equivalent practical experience. • 5 years of experience in program or project management. • Experience with manufacturing, supply chain management, or fulfillment planning and execution. Preferred qualifications: • Master's degree or MBA in Supply Chain Management, Business Administration, or Operations. • Experience with rack, server, advanced cooling solution development. • Experience across all phases of a product from prototype to mass production, and with Supply/Demand Planning and Accounting/Finance. • Ability to deliver data driven/fact based analysis for business proposal, supply chain design, and supply risk mitigation. • Ability to collaborate and influence across multiple levels of an organization, with experience leading cross-functional process improvements. • Excellent analytical and communication skills. About the job A problem isn’t truly solved until it’s solved for all. That’s why Googlers build products that help create opportunities for everyone, whether down the street or across the globe. As a Program Manager at Google, you’ll lead complex, multi-disciplinary projects from start to finish — working with stakeholders to plan requirements, manage project schedules, identify risks, and communicate clearly with cross-functional partners across the company. Your projects will often span offices, time zones, and hemispheres. It's your job to coordinate the players and keep them up to date on progress and deadlines. Our goal is to build a Google that looks like the world around us — and we want Googlers to stay and grow when they join us. As part of our efforts to build a Google for everyone, we build diversity, equity, and inclusion into our work and we aim to cultivate a sense of belonging throughout the company. Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible. Responsibilities • Drive material and supply chain readiness for all NPI builds from concept phase to production handoff, partnering with cross-functional teams to ensure a handoff for the Networking product group. • Identify, communicate, and manage supply chain risks and mitigation plans to ensure materials readiness for NPI builds as well as supply continuity into production. • Develop and document global supply chain map including suppliers, procurement model, lead time, shipment logistics, assembly/test/fulfillment model, and spares strategies. • Manage spend against project budgets, BOM health, forecast readiness in Google designated tools, and manage production risk buys. • Update project schedules, communicate status, risks and influence change, and represent the NPI Supply Chain organization in internal program meetings, driving initiatives and process improvements to help the team grow.
Minimum qualifications: • Bachelor's degree in Communications/Electrical Engineering, Computer science, or equivalent practical experience. • 3 years of experience in IP modeling. • Experience in C/C++/python and embedded systems. Preferred qualifications: • Master's degree or PhD in Computer Science or a related technical field. • Experience in full virtualization platform development. • Experience in Advanced RISC Machine (ARM) architecture. • Knowledge of Dynamic Voltage and Frequency Scaling (DVFS) control, thermal framework, power state control, power management Integrated Circuit (ICs). • Knowledge in one or more of these areas: Quality of Service(QoS) tuning, bandwidth and latency analysis, scheduler, DVFS governor, idle governor control, thermal management, device driver. • Excellent communication skills. About the job Be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology. Responsibilities • Analyze and evaluate architectural design choices for next-generation SoCs. • Develop the simulation solutions to support early software development and architecture exploration for next-generation SoC. • Collaborate closely with hardware teams and software teams (application, framework, firmware) to drive architectural decisions from concept to production. • Communicate and coordinate with key stakeholders across the organization to share priorities, roadmap, and key learnings.
Minimum qualifications: • Bachelor’s degree in Computer Science, Computer Engineering, Electrical Engineering, a related field, or equivalent practical experience. • 2 years of experience with software development in C/C++, and with data structures/algorithms. • 2 years of experience working with embedded operating systems for mobile SoCs. • 1 year of experience in system software development including kernel and user mode drivers, HAL, framework, and multimedia subsystems (Camera ISP, TPU/NPU, Video, GPU, and Display). Preferred qualifications: • Experience with mobile SoC architecture and multimedia subsystems such as Camera ISP, TPU/NPU, GPU, Video Codecs, Display Engine and Security. • Experience with system architecture analysis for complex imaging and multimedia user experiences to identify performance and power bottlenecks and areas for optimization. • Experience with ML inference pipeline development and optimization. • Experience with machine learning algorithms and tools (e.g., TensorFlow), Large Language Models and Generative AI. • Experience with GPU and DSP software development for imaging, computer vision and multimedia applications using OpenCL, Vulkan, CUDA, Halide and architecture specific C/C++ intrinsics. • Experience in Python or Java. About the job Google's software engineers develop the next-generation technologies that change how billions of users connect, explore, and interact with information and one another. Our products need to handle information at massive scale, and extend well beyond web search. We're looking for engineers who bring fresh ideas from all areas, including information retrieval, distributed computing, large-scale system design, networking and data storage, security, artificial intelligence, natural language processing, UI design and mobile; the list goes on and is growing every day. As a software engineer, you will work on a specific project critical to Google’s needs with opportunities to switch teams and projects as you and our fast-paced business grow and evolve. We need our engineers to be versatile, display leadership qualities and be enthusiastic to take on new problems across the full-stack as we continue to push technology forward. You will design, develop, test, deploy, maintain, and enhance software solutions. Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology. Responsibilities • Contribute to imaging, Machine Learning (ML) and multimedia systems architecture and design for Google’s Tensor SoCs and Pixel devices. • Build prototype/production software across the camera, Machine Learning, and multimedia software stack including kernel and user mode drivers, Android Hardware abstraction layer (HAL) and framework, ML stack, and application to prove feasibility of new and emerging use-cases on future Tensor SoCs. • Optimize power and performance of imaging and Generative AI use-cases running on-device. • Collaborate with multimedia IP and architecture, system architecture and device software teams to take the prototypes into production. • Perform detailed system analysis for complex imaging and Generative AI user experiences to identify performance and power bottlenecks and areas for optimizations, and communicate the analysis results in both quantitative and qualitative fashion.
Job Description: AIO Platform Hardware Design Specialist Position Overview: We are seeking a talented AIO Platform Hardware Design Specialist with expertise in Intel chipsets and proficiency in OrCAD and Allegro tools. The ideal candidate will have a strong background in PCB design and validation, coupled with excellent communication skills to work collaboratively with cross-functional teams. Key Responsibilities: · Hardware Design & Development: o Design and develop AIO platform hardware utilizing Intel chipsets. o Create and manage schematic designs using OrCAD and PCB layouts with Allegro. o Develop and implement EE PCB stack-up strategies, ensuring compliance with high-speed bus standards (PCIe, DP, HDMI, USB, Type-C, MIPI, Audio CODEC, Storage, Memory, Camera, etc.). · Testing & Certification: o Coordinate and execute RFQ (Request for Quotation) processes. o Manage issue debugging and ensure compliance with I/O port certifications (DisplayPort, HDMI, Thunderbolt). o Develop testing methodologies to validate hardware performance and functionality. · Qualification Planning & Reporting: o Lead ODMs and internal teams in delivering PCB designs, ensuring accurate CAD release (Gerber output). o Oversee the System Validation Test Plan (SVTP) process, including the creation and management of qualification plans and status reports. o Conduct thorough issue tracking and prepare Failure Analysis Correction Actions (FACA) reports. · Cross-Functional Collaboration: o Work closely with engineering, manufacturing, and quality assurance teams to drive successful project outcomes. o Communicate effectively with stakeholders to ensure alignment on project goals and deliverables. Qualifications: · Bachelor’s degree in electrical engineering or related field. · Proven experience in hardware design and validation, specifically for AIO platforms. · Strong proficiency in OrCAD (Schematic) and Allegro (Layout). · Familiarity with EE PCB stack-up and high-speed bus technologies. · Experience with RFQ processes and I/O port certifications. · Excellent analytical, problem-solving, and communication skills. Preferred Qualifications: · Experience in leading cross-functional teams in a hardware development environment. · Familiarity with regulatory compliance and industry standards related to electronic design.
**歡迎身心障礙者投遞履歷 2024 Hardware Engineer Campus Hire The reputation of Dell Technologies for delivering award-winning hardware is legendary and our Hardware Engineering team is at the heart of it. We design and develop analogue as well as digital hardware products – not just computer or network hardware devices but peripherals too. Recognized for our high level of technical expertise in a variety of engineering disciplines, we’re involved across the development lifecycle – from research to the building, testing and delivery of completed products. Innovators in our field, we lead the way in exploring new concepts, approaches, processes, materials and components. Join us as a Hardware Engineer on our Client Solutions Group Engineering Development team in Taipei to do the best work of your career and make a profound social impact. What you'll achieve As a Hardware Engineer, you will join the product development process with the team and understand the connection and relationship between system and peripheral products. You join have chance to engage with multiple function experts to touch and learn cross function communication and leading threads. You will: - Learn to design, validate and document in Hardware projects (Electrical or Mechanical or Firmware Engineering) - Learn about how Peripheral product working stand along or connection with system from design perspective then understand what-how of Dell products - Have chance to implement new features into Dell products - Gain different experiences of working and change your viewpoints and future career Take the first step towards your dream career Every Dell Technologies team member brings something unique to the table. Here's what we are looking for with this role: Essential Requirements - Bachelor's degree in engineering related fields and expect to graduate between 2023 February to 2024 December - Preliminary understanding of Hardware (Electric or Mechanical) or Firmware knowledge. - Interest about Dell Peripheral Product development on multiple Engineering area which across HW/FW/SW and cross function communication. - Interested in joining teams and taking tasks with engineering function leaders. - Good communication skill with fluent English and Mandarin Desirable Requirements - Ability to lead, motivate and direct a workgroup - Capability to influence others to achieve results Application closing date: 30 November 2024
1.负责x86服务器产品的电子硬件部分设计、原理图设计、元器件选型的开发与调试工作； 2.参与新产品硬件设计方案的制定和评审； 3.负责硬件部分开发和后期调试，分析并解决产品在测试，生产和使用过程中暴露出的问题； 4.产品相关硬件技术文档的编制，参与和配合公司其他部门的认证、测试，除错等工作； 5.硬件故障分析与定位
1.负责x86服务器产品的电子硬件部分设计、原理图设计、元器件选型的开发与调试工作. 2.参与新产品硬件设计方案的制定和评审. 3.负责硬件部分开发和后期调试，分析並解决产品在测试，生产和使用过程中暴露出的问题。 4.产品相关硬件技术文档的编制，参与和配合公司其他部门的认证、测试，除错等工作。 5.硬件故障分析与定位。
1.執行X光管球及相關技術研發專案 2.執行X光管球測試及驗證計畫 3.競品分析及技術文獻彙整 4.跨部門專案配合 5.主管交辦事項
1.設計和開發數位和類比電路。 2.參與3C產品電路的設計。 3.參與電力電子產品的開發，特別是房車產業。 4.與研發團隊合作，滿足客戶需求並尋求創新推出新產品。 5.確保產品品質和性能符合行業標準和客戶期望。 6.進行研究，以及為專案創建設計提案。 7.估算成本和專案進度。 8.為工程和製造部門編寫技術文件。 9.確保產品符合行業標準和法規。 10.持續學習電子工程領域的新技術和方法。 11.推動新產品進入大規模生產，同時分析並優化舊產品。
【關於這份工作】 觸控 IC 相關應用、測試功能之硬/韌體開發維護。 歡迎對於探索新技術與驗證有高度興趣及熱誠，並樂於團隊合作之人員加入。 【條件要求】 1. 電子、電機等相關科系畢業。 2. 大學以上。 3. 無工作經驗可。 【具備技能】 1. 基本電腦操作及Office文書處理 2. 熟悉示波器、三用電表等基礎儀器之使用 3. 良好的溝通表達與邏輯推理能力 4. 具C/C++語言程式設計或OrCad使用之經驗尤佳。
【關於這份工作】 IC 功能測試或燒錄之電路板設計、維護及控制韌體開發。歡迎對於電子電路設計有興趣之開發者並樂於團隊合作、對於探索新技術與驗證有高度興趣與熱誠之人員加入。 【條件要求】 1. 電子、電機等相關科系畢業。 2. 大學以上。 3. 無工作經驗可。 【具備技能】 1. 基本電腦操作及Office文書處理 2. 熟悉電子電路設計 3. 熟悉示波器、三用電表等基礎儀器之使用 4. 熟悉烙鐵焊接和熱風槍使用 5. 良好的溝通表達與邏輯推理能力 6. 具C/C++語言程式設計或OrCad使用之經驗尤佳。
我們正在尋找一位資深硬體研發工程師，將參與智慧自動化機器人項目的硬體開發，負責將各種感測器與軟體控制端對接整合。這個職位需要在硬體研發領域具有豐富經驗的專業人士，能夠設計並整合不同類型的感測器硬體，確保其與軟體系統的順暢協同運作。 主要職責: * 評估、測試並優化公司產品所需的各種感測器硬體 (Sensor Fusion)，包括深度視覺、溫度、位置追蹤器 (Motion Capture) 等。 * 與軟體團隊密切合作，確保感測器與軟體的無縫整合。 * 參與硬體與軟體之間的通訊協議開發，確保資料的高效傳遞。 * 協調並整合硬體開發團隊的工作成果至公司產品中。
我們擁有新創公司的活力與授權的工作氛圍，提供多元的發展機會，同時兼具集團完整的薪酬福利及升遷考核制度。 對於新進人員，我們提供完善的新人培訓及Buddy(夥伴)制度，歡迎擁有探索熱情的夥伴加入我們的行列！ ■工作及團隊概述 與機構、工業設計、軟韌體開發團隊一同協作新產品設計開發 硬體開發及軟韌體開發合稱「機電團隊」，機電團隊氛圍活潑、夥伴們能即時溝通討論、互助及分享知識。 ■作為硬體開發工程師，你將負責的工作是： 1. 智能運動產品電路硬體開發與產品整合－50% 2. 產品測試驗證－20% 3. 產品故障排除與維修(協同FAE/品保)－15% 4. 產品量產導入、技術移轉－15% ■需具備的特質及能力： 1. 熟悉PCBA電路板設計佳。 2. 機電硬體設計與開發管理經驗 3. 主動積極，具處理問題的熱忱，與解決問題的能力。 ※ 未來發展方向：可接觸多種類智能產品開發、與國外客戶及工程師合作專案，養成專業能力，若個人興趣符合，也可往PM/管理職發展。 ※ 工作經歷符合職缺者，待遇可議。
