• U.S leading company focus on IP design service.
• A Pioneer in Cutting-Edge Technology with Promising Development Opportunities
About Our Client
• A leading technology innovator renowned for its contributions to advanced processor and system architectures, serving a wide range of industries including servers, computing, and embedded systems.
• The company partners with global leaders to enable cutting-edge solutions, leveraging its expertise in semiconductor design and ecosystem development.
Job Description
Job Overview:
This role primarily focuses on IP and subsystem products tailored for the Server and Hyperscale Computing markets. It involves understanding customer objectives, analyzing requests and issues, and providing effective solutions. Over time, the role expands to include delivering training, offering system design advice, and collaborating with engineering teams to enhance products and drive the adoption of new technologies. Additional responsibilities include raising product defects, reviewing documentation, and creating knowledge resources.
Responsibilities:
• Provide prompt and accurate technical solutions to customer inquiries.
• Develop and deliver technical training courses on system IP and subsystems, both onsite and remotely.
• Collaborate with design and product management teams to enhance user experience and shape feature development.
• Innovate tools and techniques to improve the efficiency of Engineers in addressing challenges.
What's on Offer
• Join a globally renowned company, develop advanced technical skills, and enjoy competitive compensation and benefits.
Timeline Capital is looking for FPGA engineers to build low-latency trading technology. Together with other technologist, you will be advancing our core trading system. You need to be passionate about vetting ideas and high-level inquiries from trading teams to continually find the best solutions to solving our trading needs. A financial background is not necessary, rather we are looking for self-motivated developers that have practical experience applying new technologies or techniques to solve challenging problems.
Our FPGA engineers are focused on accelerating the speed of our trading system which include:
- Trade Engine and Backtesting
- Exchange Connectivity
- Strategy Monitoring and Reporting Tools
- Compliance and Risk Verification
You will have the opportunity to:
- Partner with trading desks in developing, implementing, and executing FPGAs to
accelerate trading platforms and build the next generation of hardware solutions
- Work alongside top technologists focusing on real-time acceleration and high
performance computing
- Bridge the gap between hardware and software, working at the intersection of both
to build a truly sophisticated trading platform
Timeline Capital 正在尋找 FPGA 工程師來打造低延遲的交易系統。您將與其他技術人員一起推動我們核心交易系統。並針對團隊的問題進行研究並不斷尋找最佳解決方案來滿足交易需求。我們不限產業且非常歡迎具有實驗精神的開發者,能夠運用新技術或新方法來解決挑戰性問題。
我們的 FPGA 工程師必須專注於加速我們交易系統的速度,包括:
- 交易引擎與回測
- 交易所連接
- 策略監控與報告
- 風險控管
您將有機會:
- 與交易團隊合作,開發、實施並執行 FPGA 以加速交易平台,打造硬體解決方案
- 與頂尖技術人員共同工作,專注於實時加速與高性能計算
- 建構一個硬體與軟體之間的橋樑,並在兩者的交集處工作
【Job description】
1. FPGA system integration
• Peripheral Interface: DDR, I2C, MIO, EMIO, SPI, Ethernet, UART, GPIO, IRQ, SERDES, ARM peripheral config
• Memory : DMA, BRAM, device address editor
• System Timing: Clock generation, Timestamper, PPS handling
• Alarm Tool Development
• Measurement Tool Development
2. Co-working with cross-functional teams on projects.
• System board bring up with EE team
• System board bring up with Driver team
【Nice-to-have skills】
-Experience in ORAN framer/de-framer is plus
-Experience in PTP/IEEE 1588 is plus
-Experience in AMD SOC(Xilinx) is plus
新竹工作地點:竹北台元科學園區
The EDA Application Engineer (EDA AE) is expected to support the sale and adoption of EDA products, assisting customers in achieving success with our Verification and Implementation related products, including System Level Design, Simulation, Synthesis, Test, Design Reuse, Place & Route, and more. Responsibilities include providing pre-sales activities and post-sales technical support such as technical presentations, technical support, product application, product deployment, expert training, and competitive benchmark. You should be able to serve as the product expert and drive the success of EDA design flow and tools.
EDA應用工程師(EDA Application Engineer)的職責是支援EDA產品的銷售和採用,協助客戶在我們的驗證和實現相關產品上取得成功,包括系統層級設計、模擬、綜合、測試、設計重用、佈局佈線等等。職責包括提供前期銷售支援和售後技術支援,像是技術簡報、技術支援、產品應用、產品導入、專業培訓以及競爭性評估。您必須成為產品專家,引領EDA設計流程和工具的成功。
In addition, you will have the opportunity to work with and gain exposure to various designs while providing support to different customers. Through customer interactions, you can enhance not only your technical knowledge but also your soft skills, paving the way for a more diverse and successful career growth.
除此之外,您將有機會透過支援不同的客戶,接觸各種不同的設計。在與客戶溝通的過程中,您可以加強不僅是技術知識,還包括軟實力知識,為更多元的未來職涯發展打下基礎。
Key Qualifications
MSEE/BSEE or equivalent required, with 2+ years of experience
Experience in using ASIC/SoC front-end and/or back-end EDA tools with design knowledge is preferred
Strong customer sensitivity and ability to handle multiple issues while setting priorities
Demonstrates a helpful and caring attitude towards customers, with a desire to help them leverage new technologies
Self-motivated, capable of working independently, and possesses excellent communication skills, including a good command of English
主要資格:
具備碩士學位(MSEE/BSEE)或相當程度,並擁有2年以上的相關經驗
具有使用IC/ASIC/SoC前端和/或後端EDA工具的經驗,具備設計知識更佳
具有對客戶的敏銳觀察力,能夠處理多個問題並優先排序
展現樂於幫助和關懷客戶的態度,並渴望協助他們採用新技術
自我激勵,能夠獨立工作,具有出色的溝通能力,包括良好的英語掌握能力
Join our verification team to ensure the quality and reliability of SoC-level IP used in next-generation automotive systems. You will develop UVM-based environments, drive functional and safety verification, and collaborate with cross-disciplinary teams to deliver ISO 26262-compliant silicon.
1. Plan & execute verification of automotive-grade IP at block, subsystem, and full-chip levels
2. Develop UVM test environments, scoreboards, and coverage to meet quality and safety goals
3. Create diagnostic and stress tests for pre-silicon and post-silicon validation, ensuring performance and robustness under corner conditions
4. Collaborate with design, DV, and safety teams to define verification strategies, close code/functional coverage.
5. Drive continuous automation of regression, data mining, and result visualization to accelerate tape-out readiness