Job Contents
· Perform Netlist-to-GDS design flow, including floor planning, placement, timing optimization, clock tree synthesis and routing.
· Perform STA timing analysis and fixing.
· Perform physical verification, including DRC, LVS, IR drop and DFM analysis.
. Has 40nm and below APR implementation experience.
. More than 5 years experience in TOP and block level APR.
1. Product Development: Lead the efficient development of high-performance power converter circuits, such as multiphase VR controllers.
2. Top-Down Design: Implement a top-down design approach for analog mixed-signal design.
3. Block Level Specification: Create block-level circuit specifications based on system-level requirements.
4. Circuit Design: Design analog mixed-signal circuits at the transistor level, block level, and chip top level.
5. Design Reviews: Conduct detailed design reviews to ensure quality and adherence to specifications.
6. Collaboration: Work with other design leaders to establish and maintain effective circuit design and development practices.
7. Cross-Functional Coordination: Collaborate with teams including marketing, application, test, reliability, and layout.