1. IC package design 2. Package/PCB model extraction

1. IC package substrate design and layout 1.1. Package type includes flip-chip and wirebond. Single die design and multi-die design 1.2. Substrate layer count from 2 layers to 20+ layers. Preferred experience is at least 4 layers (1-2-1) 1.3. High-speed (DDR, SerDes, PCIe...) signal routing optimization 1.4. Good knowledge in substrate layout design rules and package assembly design rules 2. Chip-Package-PCB co-design 2.1. Review die bump assignment and BGA ball assignment to provide suggestions to optimize the design

A. 負責與協調新產品的驗證、試產、量產等相關事宜。 B. 瞭解與紀錄Chip Information (Process, Die Size, PAD Structure, Layout, Design Rule以及所有與Yield有關的資訊)。 C. 對產品的瞭解與協調此產品順利移轉量產。 D. ATE Program Release和新產品Release的協調者。 E. 閱讀CP廠的針測記錄表，Wafer Mapping圖等，以利良率分析與改進。 F. 產品Low Yield的分析與處理 (有無Low Yield的分析單或是處理單)。 G. ATE (自動化測試設備) 測試程式開發與維護。 H. 測試時間的最佳化。 I. Module Board, Probe Card, Load Board & IQC治具等硬體配件的開發，維護與評估。 J. 工程分析用程式，監控關鍵參數程式，量測產品規格與特性的程式開發。 K. 利用ATE開發分析程式，支援低良率Root Cause的尋找與澄清。 L. 新產品Design Review時，提供可測性或是以往經驗等意見。 M. 測試Program Release與Trim電路的提供。 N. Assembly Coding 經驗。 O. FPGA 相關經驗。

Position：Negotiable, from senior engineer to assistant manager depend on experience 1.Work with PM/RD/QA for all of engineering job in OSAT (Assembly/Test) 2.Project coordination and host the review meeting (OSAT related) with PM/RD、customers、vendors 3.Key responsibilities including : (1)New production introduction (2)New package survey and qualification in OSAT (3)Engineering verification (4)Process change management (5)Electrical and physical analysis of characterized parts, production improvement /problem solving, and document preparing of project owner in each phase of APQP to speed up the release schedule of new product to production.

1. 孰悉 LAN Card、LAN Switch、USB(HUB, Dongle...)、PCIe 等相關電腦周邊產品測試。 2. 測試與驗證業務/客戶端的問題(FAE)。 3. 撰寫使用手冊(User Menu)、安裝手冊或其他客戶支援相關文件。 4. 公司網頁產品驅動程式測試與維護。 5. 測試與驗證產品功能、相容性、效能、壓力承載、可靠度等。 6. 建立測試環境，撰寫、維護、改善測試程式。 7. 分析測試資料、釐清問題、提出改善建議，並撰寫測試報告。 8. 維護相關測試設備。 9. 發行與管理測試相關文件。

【主要職責】 1. 滿足並優化客戶的光電半導體封裝設計需求 2. 未來1-3年新型光電半導體封裝技術的研發 3. 封裝技術專利佈局 4. 逆向工程分析 【其他條件】 1. 熟悉機械視圖及AutoCAD操作為必要條件 2. 通過內部AutoCAD實機操作考試 3. 具備獨立作業能力 4. 良好的溝通與協調能力 5. 擁有製圖科學歷或具備LED或半導體封裝設計經驗者優先

【主要職責】 1. LED/Sensor產品設計,開發與驗證 2. LED/Sensor產品Demo kit 設計 3. 封裝材料分析與開發 4. 產品失效樣品分析 5. 專利申請和技術發表 6. 參與跨部門專案，與其他部門協作完成產品開發與改進 【職務需求】 1. 材料、化工、電子、電機、光電相關科系 2. 有光電領域相關經驗者優 3. 熟悉LED/光電Sensor技術及其相關應用開發者優

1. 混合式測試應用程序開發設計 2. 客戶產品測試平台轉換程式開發 3. 測試方向技術研究與創新 4. 熟C語言佳

Our Purpose TERADYNE, where experience meets innovation and driving excellence in every connection. We are fueled by creativity and diversity of thought and in our workforce. Our employees are supported to innovate and learn something new every day. We cultivate a culture of inclusion for all employees that respects their individual strengths, views, and experiences. We believe that our differences enable us to be a better team – one that makes better decisions, drives innovation and delivers better business results. Opportunity Overview • Perform system installation, Project Management, calibration, retrofit, training and troubleshooting. • Escalates customer production problem and take ownership of problem until it is resolved. • Develop relationship with customer ; Work with the customer actively on issue prevention. • Creates and implements support plan for customer in conjunction with cross functional groups and customer maintenance teams with objectives of reducing equipment downtime and maintenance cost. • Execute with the various support teams within Teradyne to deliver on Teradyne commitment to customer. This includes all technical resources engaged with account. • Play an active role in transferring the needed application knowledge from the specifier team into the customer production support team during the release phase. • Provides technical expertise and value to customers (Hardware and software)and manage internal/external resources, application/production issues activities. • More senior levels may provide recommendations/inputs into the next generation product development.

<< 請提供英文簡歷>> 此職缺 為SLT 自動化整合工程師。 SLT(System-Level Test，系統層級測試)模擬完整的使用情境，驗證晶片 SoC(System on Chip)是否能在實際使用環境下正常運作。 本職缺專注於開發與整合測試工具程式，結合自動化與手動測試，確保測試程式的正確性與效能。 工作內容 - 開發與維護 Python 腳本(scripts)與工具: 使用python 撰寫與開發 scripts，用於解析、處理SoC/晶片測試數據(如電壓測試、即時 溫度、功耗數據等)。 - 建立與維護 CI/CD 模組: 開發並維護功能測試腳本，實現自動化測試流程。 - 手動功能驗證測試: 進行小批量 SoC/晶片測試，驗證測試腳本的正確性與可靠性。 - 版本管理: 管理 Branch，確保功能測試通過後將變更合併至主分支。 所需專業與技術 - 3 年 以上Python 程式開發經驗。 - 熟悉 Linux 環境的程式開發。 - 曾參與半導體或電子產業的產品測試。 - 良好的英文聽說能力，能使用英文與團隊日常工作溝通。 - 具備獨立作業團隊合作與快速學習能力。 優先考慮 - 熟悉 SoC/晶片測試流程。 - 熟悉 Linux 環境下程式開發。 - 軟體整合(C/Python/Android) 經驗。 - 熟悉 CI/CD 流程與工具（如 Jenkins、Git 等），具備自動化測試與部署經驗。 - 具備優秀的問題解決能力，能快速開發工具以支持測試與數據分析需求。

1.負責半導體IC設計、先進封裝技術、CMP製程整合、品質管理 Responsible for semiconductor IC design, advanced packaging, CMP integration, and quality management. 2.產品領域為消費性電子等 Focus on consumer electronics products. 3.工作地點為台北/新竹/台中 The job is based in Taipei, Hsinchu or Taichung.

【2025暑期實習計畫介紹】 在德州儀器Texas Instruments實習的期間，將有專屬學長姐帶領您，體驗快速變動的跨國際工作環境，獲得充足的專業訓練、貼近實務工作的專案實務經驗，並能享用公司各式線上資源，享受與正職員工同等的優渥的福利待遇，並能優先獲得畢業轉正職的預聘機會，畢業立刻就業！ 您可以說「在TI，你所做的不只是一份工作，而是在參與改寫人類科技及生活方式的發展史」；加入TI，你有機會與全世界的菁英互動，TI更是你展現獨特智慧與潛能的最佳平台。 【實習期間及實習地點】 -實習期間：2025年07月至2025年08月 -實習地點：新北市中和區興南路一段142號 OR 新北市中和區中正路866號 【產品測試工程師實習職務說明】 • Test solution debug at manufacture production line 改善IC自動化測試流程，幫助提昇IC生產效率。 • Identify chances to increase test yield and throughput 了解半導體製造生產流程及良率改善。 • Design, develop, and implement testing methods, diagnostic programs, specifications and procedures for new products. IC測試程式撰寫及特性分析 【從產品測試工程師實習可獲得甚麼】 • IC Assembly and Test processes and methodology • Collaboration with cross-function experts

1. IC新產品驗證/測試/分析 2.測試程式開發 3.客戶應用支援/客訴處理 4.產品相關應用問題回覆及測試 5.工廠生產良率管理及異常處理分析 6.等主管交辦事項

1. Performing reliability testing including Mechanical, Environmental, IPX and chemistry tests...etc. 2. Reliability test equipment customs clearance, setup, calibration, maintenance and test data analysis 3. Arranging technician to perform every reliability tests, track the test schedule, collect the test datas and compose test report. 4. Providing reliability test report and highlight reliability test issues 5. Optimizing the reliability test methods and test specifications 6. Training on testing skills and ensure the SOP has been followed strictly; 7. Follow-up and push-up with the test to meet the schedule;

1. 測試程式開發(熟悉Analog IC測試) 2. 測試配件設計(CP/FT線路) 3. 產品功能驗證 4. 量產良率改善 5. 能配合機動性出差 6. 具測試程式開發2年經驗，熟悉C/C++語言 7. 具基本電學與數位邏輯觀念 8. 熟半導體封裝/測試流程 【工作待遇依工作經歷敘薪】 【此職務上班地點在汐止】

Responsible for developing smart phone tester and validating the tester system in factory to support a new product introduction from PROTO to MP stage. This includes: 1. Working closely with CM development and design teams early in the product development life cycle. Specifying new feature test coverage/test requirement specification definition 2. Responsible for station online bring up, including tester set up, test SW/HW validation, calibration & stress test. 3. Responsible for analyzing test exception and tester online maintenance 4. Improve station stability to hit MP target

1.客戶端的相關應用問題及客訴問題處理 2.客戶應用電路測試驗證，協助客戶排除客戶應用上的問題等等 3.短期國內、外出差，協助業務推廣、核對替代料號 6.等主管交辦事項

Job Description: We are seeking highly motivated and skilled validation engineer to join our team . The ideal candidate will have a degree in Electrical Engineering or computer science and are experienced in using lab equipment for failure analysis, excellent communication skills, and proficiency in reading and writing technical documents in English. Responsibilities: - Manage lab and share resources, including documentation for resource tracking and standard operating procedures(SOPs) - Collaborate with teams to manage requirements for lab space and land plans - Improve processes and develop rules for users to ensure safe and orderly lab usage - Conduct measurement and analyze data using lab equipments ( oscilloscopes , thermal header/chamber and multimeters) - Run manual and automation test cases, debug, and summarize log bugs - Read and write technical documents in English - Utilize basic Python skills to automate tasks and improve processes - Perform routine maintenance on laboratory equipment, including calibration, troubleshooting, repair and test platform setup. - Conduct regular checks and inspections of laboratory facilities to ensure that they are safe, clean and well-maintained. - Work with laboratory staff to identify and address any maintenance or safety issues that may arise Requirements: - Bachelor's or Master's degree in Electrical Engineering or Computer Science - Minimum of 2 years of relevant work experience - Proficient in using lab equipments (oscilloscopes, thermal header, multimeter) and Excel or Google Sheets - Excellent communication skills and ability to work in a team environment - Ability to read and write in English - Basic knowledge of Python programming language

1. 具記憶體&Nandflash晶圓(Good Die & Ink Die)相關之測試工作經驗者尤佳 2. 具記憶體&Nandflash儲存產品之半成品&成品相關之測試工作經驗者尤佳 3. 新產品測試流程開發與驗證 4. 建立晶片與IC相關測試平台,並有相關操作經驗 5. 具有測試平台參數調整經驗,並可排除一般基本問題 6. 評估公司內部相關產品測試專案計劃,並訂立各項測試排程 7. 針對各項產品制定測試流程SOP,及測試平台操作SOP 8. 熟悉記憶體相關原料與半成品規格 9. 其他主管交辦事項

請提供<<英文簡歷>> 產品: SOC 本工作角色: 主要是利用統計軟體，對CP 生產資料進行統計分析 目標 提高生產良率 1. 使用統計軟體 統計與分析產線生產良率 2. 利用生產資料分析不良率分析，找出造成不良率相關因素 3. 新產品導入不良率(DPPM) 分析 4. 與其他團隊合作 (ATE, SLT) 共同討論測試程式規格 經驗需求: 1. 3年以上 半導體 , IC 測試產業. 2. 有接觸過28nm以下產品製程 (必要條件) 3. 有CP or FT 等相關測試經驗 3. 有接觸過SOC 產品測試方法(必要條件) : 如ATPG, Mbist, Vmin and IDDQ 等測試 4. 熟統計軟體，如: JMP、Exensio、python 進行晶片測試良率分析 5. 柏拉圖分析(Fail Pareto Analysis) 6. 接觸過(ATE)測試機台，如Advantest 93K、Teradyne UltraFlex SOC測試系統 7. 熟悉製程技術，Wafer Sorting，最終測試數據分析, 測試時間降低與量率改善經驗