Design High speed interface IC.
待遇面議
(經常性薪資達 4 萬元或以上)
MSEE with 3 or more years’ experience in high speed interface design. Experience in MIPI D-PHY, MIPI C-PHY, CTLE, DFE design. PLL/DLL/CDR GHz PHY Design is better. Experience in analog design of OPAMP, OSC, Bandgap, LDO. Familiar with IC design flow. Experience in using Cadence IC design environment is better.
◆ 獎金/禮品類 三節及生日 禮券/禮金 ◆ 保險類 1.勞保 2.健保 3.員工團保 4.眷屬團保 5.意外險 6.職災保險 ◆ 休閒類 福委會團康活動 ◆ 制度類 介紹獎金 ◆ 休假制度 1.週休二日 2.優於勞基法之特休年假 3.陪產假 4.家庭照顧假 5.彈性上下班 ◆ 免費零食與雀巢義式咖啡