IC設計類:DDR IP Design Verification Engineer (熟悉UVM/SystemVerilog)

請務必上官網投遞履歷:https://careers.synopsys.com/job/hsinchu/ddr-design-verification-engineer-sr-staff/44408/78985864320 Digital IP Verification, Staff Engineer Our group is working is working on cutting edge DDR controller design and verification targeting the current and next generation DDR technology, such as DDR5, LPDDR6. The position offers an excellent opportunity for a highly experienced verification engineer to work with a professional team of digital engineers responsible for delivering high-end designs from specification development to performing functional verification, performance analysis down to successful IP releases. The controller IP development is very dynamic and provides an endless list of challenges. This work is very challenging, not only given the constant technological changes but also given the ownership and the need to charter unknown waters. Does this sound like a good role for you? Responsibility and Key Qualification • This position is for leading edge IP verification. • Study standard specifications published by JEDEC. • Work on UVM methodology-based verification platform. • Study design micro architecture, implement high quality verification from defining verification spec, planning and implement infrastructure, down to analyze and debug regression failures, and reach full function coverage. • Work with design team to debug and fix RTL issues. • Work with VIP teams for VIP issues • Must be self-motivated, proactive, and able to achieve good quality while meeting tight deadlines. • Mentor junior engineers and work with multiple team members. • Good communication skills for interacting between different design groups and customer support teams are required. Preferred Experience • MSEE plus with a minimum of 5 years of experience in UVM-based verification methodology. And demonstrates good analysis and problem-solving skills. • Knowledgeable and experienced in UVM, assertions. Skills in Formal verification is a plus. • Knowledgeable in DDR is a plus. • Solid theoretical and practical background in AXI, CHI, CRYPTO and RAS is a solid plus. • Scripting experience in Shell, Perl, Python and TCL is a plus. • Be fluent in English, both speaking and writing. • Demonstrates good attitude in teamwork. Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.