資深數位IC設計工程師 (Senior Digital IC Design Engineer_ISP and Video Codec) [Hsinchu/Taipei]

【工作職責 (Responsibilities)】： ★ Plan design architecture. ★ Develop high quality digital design. ★ Be familiar with IC design flow. ★ Professional Experience ★ Experienced in image/video module design ★ Experienced in SoC front-end integration flow ★ In-house core algorithms' module design 【符合條件 (Qualifications)】： 必須條件 (Minimum Qualifications)： ★ Experienced in Verilog RTL language ★ Experienced in digital IC design front-end flow ★ Experienced in CAD tool usage such as simulation tool, linting tool, synthesis tool ★ Familiar with video codec algorithm (H.264, H.265, H.266, AV1)