台灣亞德諾半導體股份有限公司 企業形象

公司介紹

產業類別

聯絡人

HR

產業描述

半導體相關業

電話

暫不提供

資本額

傳真

暫不提供

員工人數

200人

地址

台北市信義區松高路77號27樓


Analog Devices Inc.(簡稱ADI),為全球類比IC第二名的供應商。自1965年創建以來,多次被 Fortune 雜誌獲選為世界五百大及美國前一百大最嚮往為它工作的企業,且榮登商業週刊全球最佳百大科技公司第十名 。ADI設計、製造、行銷Mix Signal, Digital Signal Processors, D/A, A/D Converter 高功能積體電路產品(ICs),Analog Devices美商亞德諾公司是全球精密高效能積體電路的領導廠商,產品廣泛用在類比和數位訊號處理應用中。公司總部設在美國麻薩諸塞州諾伍德市,擁有員工約15,000人,製造廠遍布世界各地在麻州、加州、愛爾蘭、菲律賓皆有製造廠,ADI公司的股票在紐約證券交易所上市,並且納入標準普爾指數500家 (S&P 500 Index)。 ADI 網站:https://www.analog.com ADI LinkedIn 頁面:https://www.linkedin.com/company/analog-devices/ 「響應參與【產學研工程人才實務能力卓越基地計畫】工程人才網路就業媒合平台」IDBET_104

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台灣亞德諾半導體股份有限公司 產品應用包羅萬象

主要包括一般性、標準功能的線性IC、訊號混合IC(Mix Signal IC)、系統IC、最新數位訊號處理器的IC(DSPs)、D/A & A/D 轉換器(Converter)及一些高密度結合具特定功能之積體電路(ASIC)。ADI是轉換器供應商的龍頭,在全球的資料轉換器市場中,以47.5%的佔有率居於世界第一的領先地位。

公司環境照片(8張)

台灣亞德諾半導體股份有限公司 企業形象

公司發展歷程

1965.01

Analog Devices 成立

工作機會列表

12/08
新竹縣竹北市經歷不拘學歷不拘
Analog Design Engineer (Power) You will be responsible for… • Participate in cutting-edge power management IC/IP development. • Work with system and marketing team for the new product definition and customer engagement for new product development • Work with cross functional teams and contribute to the best design topology and methodology for a given application i.e automotive. • Develop the Integrated Circuit product objective specification document that includes die size estimation, package selection, pin descriptions, block diagrams and all aspect of Integrated Circuit electrical specifications. • Model and Design the Integrated Circuit from beginning to end which includes top level modeling, schematic captures, and simulations. • Select the appropriate process that maximizes the value of the final IC product with the best engineering trade-offs. • IC bench verifications, failure analysis and yield improvements support. • Interface with application engineers, test and product engineers, process engineers and sale engineers to ensure the success of the Integrated Circuit product development from concept to final release to production. Requirements: • MSEE or PhD in Microelectronics/Electrical Engineering or related • 2 years relevant experience in related job • Candidate must be intimately familiar with the design of analog building blocks, and state-of the art techniques for performance optimizations. • Mix-signal/Power IC/System design knowledge and experience are preferred. • Willing to work with multi-site team. • Fluence in both spoken and written English • Self-starter. Passionate about the creative work. Excellent communication skills and team player.
月薪60,000~110,000元
應徵
12/08
新竹縣竹北市經歷不拘學歷不拘
Analog Design Engineer (Signal Chain) Job Title: Senior Analog Design Engineer In this position, your primary focus will be signal chain and sub blocks design, including ADC, DAC and various Amplifiers, you will also have opportunities to participate in system architecture design of the new product. Responsibilities • Participate in cutting-edge analog and mix-signal IC development. • Work with cross functional teams and cross sites, contribute to the best design topology and methodology for a given application i.e. automotive. • Work with system and marketing team for new product definition and customer engagement for new product development. • Develop the product objective specification document that includes die size estimation, package selection, pin descriptions, block diagrams and all aspect of IC electrical specifications. • Model and Design from beginning to end which includes top level modeling, schematic captures, and simulations. • Select the appropriate process that maximizes the value of the final IC product with the best engineering trade-offs. • IC bench verifications, failure analysis and yield improvements support. Required Skills and Qualifications • Master or PHD in Electrical Engineering with experience in analog/mixed-signal IC development • 2 years relevant experience in related job • Strong skills in CMOS analog design • Strong s-domain and z-domain analysis skills • Organized, thorough, and detail-oriented with strong communication skills • Self-motivated with strong analytical and problem-solving skills Preferred Skills and Qualifications • Knowledge of discrete-time and continuous-time signal processing • Experience in system and behavioral modeling • Experience in Delta-Sigma ADC/DAC, SAR ADC and Amplifiers. • Good silicon debug skills • Understanding of reliability concerns • Different CMOS processes and geometry nodes • Willing to work with multi-site team
月薪60,000~120,000元
應徵
3/19
新竹縣竹北市6年以上碩士
In this position, your primary focus will be signal chain and sub blocks design, including ADC, DAC and various Amplifiers, you will also have opportunities to participate in the design of power converters and other supporting circuitry across CMOS/BCD process nodes. Responsibilities • Participate in cutting-edge analog and mix-signal IC development. • Work with cross functional teams and cross sites, contribute to the best design topology and methodology for a given application. • Develop the product objective specification document that includes die size estimation, package selection, pin descriptions, block diagrams and all aspect of IC electrical specifications. • Model and Design from beginning to end which includes top level modeling, schematic captures, and simulations. • Select the appropriate process that maximizes the value of the final IC product with the best engineering trade-offs. • Oversee the IC layout and provide guidance to the demo-board PCB layout. • IC bench verifications, failure analysis and yield improvements support. Required Skills and Qualifications • Master or PHD in Electrical Engineering with experience in analog/mixed-signal IC development • Strong skills in CMOS analog design and layout • Strong s-domain and z-domain analysis skills • Organized, thorough, and detail-oriented with strong communication skills • Self-motivated with strong analytical and problem-solving skills • Ability to work with a sense of urgency and thrive in a dynamic environment Preferred Skills and Qualifications • Knowledge of discrete-time and continuous-time signal processing • Experience in system and behavioral modeling • Experience in Delta-Sigma ADC/DAC, SAR ADC and Power Amplifiers. • Good silicon debug skills • Understanding of layout • Understanding of reliability concerns • Different CMOS processes and geometry nodes 歡迎身心障礙者應徵
月薪40,000元以上
應徵
4/08
新竹市經歷不拘大學以上
Overview This role and position is responsible for handling engineering work in test subcons in Taiwan. The job function includes introducing NPI/NPR, maintaining production line in good shape to meet delivey target. Manging product yield and test HW performace. This role requires frequently interacting with internal teams and OSAT to get things done effiently and on schedule. Responsibilities • Introduce NPI/NPR to OSAT. Set up and maintain process flow within spec.. • Work with OSAT to main test HW in good shape. • Manage yield and debug production issue. • Manage ADI consigned assets at OSAT. • Support SQE for internal/external audit and drive CIP. Qualifications & Skills • Minimum 2 years expertise in semiconductor testing segment. • Familiar with software application on mainstream ATE. Teradyne iFlex/uFLEX/J750/Eagle, LTX MX/CX are preferred . • Familiar with CP and FT process • Good skills and experience on probe card/LB repair. • Familar with prober and handler. TSK UF3K, Seiko Epson/Hontec handler/MT9510 are preferred. • Be able to work independently, proactivitly. • Fluently speaking, and writing in English. 歡迎身心障礙者應徵
待遇面議
應徵
4/02
新竹縣竹北市經歷不拘碩士以上
Key responsibilities for the role include: • Participate in cutting-edge power management IC/IP development. Design of high-performance wireline and analog circuits • Develop power, performance, and area optimal topologies • Co-work with layout, digital, and system teams for optimal design • Discussions and presentations with clients Qualifications: • Minimum of a Masters or PhD in Electrical Engineering • Deep knowledge and experience designing a subset of SerDes building blocks: ADC, DAC, LC-Oscillators, PLL, CDR, CTLE, DFE • High-speed circuit design (>10GS/s) experience a significant asset • Multiple designs taped out, ideally in wireline projects • Experience working with Cadence tool flow • Experience with circuit layout and floor planning • Matlab/Simulink, Python experience • Comfortable with scripting and programming • Excellent communication and presentation skills • Strong team player 歡迎身心障礙者應徵
待遇面議
應徵
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