翊傑科技股份有限公司

職務說明 1.3+ years experiences in ASIC/SOC IC design, sample verification 2.Experience on RTL / Verilog design, synthesize, formal check, simulation 3.Familiar with ARM-Cortex CPU (or 32-bit CPU) bases ,mixed signal SOC design is a plus 4.Experience on FPGA design and verification/validation is a plus 5. Experience to plan and execute IC verification in Lab and write test report, and able to outsource verification board design 6.Able to write block design or small IC specifications 7.Able to write specification and reports in both Chinese and English 8.English communication capability is a must 9. Team work oriented is a plus 10. Able to work across different department or functions to optimize ASIC design

經歷不拘 1. Location：新竹 2. 大學以上電機、資訊相關科系畢業。 3. 熟悉 Verilog RTL、Synthesis、Simulation、Timing Analysis 等相關 IC Design Flow。 4. 熟悉 Design for Testability 技術，包含 Scan / ATPG、Delay Test、Memory BIST、 Boundary Scan、Diagnosis 等。 5. 有 DFT Tools (如 DFT Compiler、TetraMAX、BSD Compiler、FastScan、 TestKompress、MBISTArchitect) 使用經驗者佳。 6. 對於 Nanometer / SoC DFT Implementation、開發及推廣設計流程有興趣者。

經歷不拘 1. Location：新竹 2. 大學以上電機、資訊相關科系畢業。 3 . APR實體設計工程師 4. Working on advanced node design methodology, PD execution and sign-off 5. Develop advance clock tree structure 6. Able to handle complex APR with 500+ hardmacros 7. Project analysis in early stage

Description of Talent Job Requirement職務說明 1.(Manger or Director)15+ years mixed signal ASIC/SOC design circuitry design and team manage experience (Sr. Engineer or Engineer) 3+ years experiences in ASIC/SOC mixed-signal circuitry design is a plus 2. Experienced on any multiple design of following analog IPs: IO, band-gap, DLL, PLL, POR, Comparator/Amplifier, ADC,DAC ,Sensor array, MRAM Macro, ReRAM macro, design, modification, testing/,validation. 3. Familiar with IO　circuit design, Latch up/ESD protection mechanism , signal integrity quality control ,power , and IR drop 4. Familiar with Analog, memory IP, special circuitry library cell behavioral model 5. Solid discipline to perform flow of Analog design, layout plan and layout review, post-sim, modification for target and margin 6. Familiar with analog design flow and analog IP integration on SoC, power plan, performance ,cross talk is a plus 7. Experience with SoC failure mode on EMMI/ORBICH methodology and debug strategy 8. Familiar analogy IP behavior model and timing lib creation or modification for SoC integration is a plus 9. (Manager/Sr. Engineer) Able to communicate with customers and transfer technical specifications to IC design specification for feasibility study , and create project database to perform multi-people work on same project data for IC design. 10. Good team work and new technology learner spirits 11. English communication capability is a must 12. Able to write design document , test report and failure analysis report structurally in English and Chinese

Description of Talent Job Requirement職務說明 1. 5+ years experiences in ASIC/SOC mixed-signal circuitry design is a plus 2. Experienced on any multiple design of following analog IPs: IO, band-gap, DLL, PLL, POR, Comparator/Amplifier, ADC,DAC analog circuit design, modification, testing/,validation. 3. Familiar with IO　circuit design, Latch up/ESD protection mechanism , signal integrity quality control ,power , and IR drop 4. Familiar with Analog, memory IP, special circuitry library cell behavioral model 5. Solid discipline to perform flow of Analog design, layout plan and layout review, post-sim, modification for target and margin 6. Familiar with analog design flow and analog IP integration on SoC, power plan, performance ,cross talk is a plus 7. Experience with SoC failure mode on EMMI/ORBICH methodology and debug strategy 8. Familiar analogy IP behavior model and timing lib creation or modification for SoC integration is a plus 9. Good team work and new technology learner spitits 10. English communication capability is a must 11. Able to write design document , test report and failure analysis report structurally in English and Chinese

1.Business development for Taiwan & selected oversea market 2.Promote ASIC and design service to customers 3.Manage direct accounts 4.Budget/Actual/forecast on revenue and margin 5.New accounts development and retain repeated customers 6.Relationship management with customers 7.Quotation/Contract/value added negotiation with customers 8.Work closely with internal team to win customers 9.Order handling and co-work with PM to Fulfill QCD delivered on contract 10.Sales related issues management with customers and internal team

1.Business development for Taiwan & selected oversea market 2.Promote ASIC and design service to customers 3.Manage direct accounts 4.Budget/Actual/forecast on revenue and margin 5.New accounts development and retain repeated customers 6.Relationship management with customers 7.Quotation/Contract/value added negotiation with customers 8.Work closely with internal team to win customers 9.Order handling and co-work with PM to Fulfill QCD delivered on contract 10.Sales related issues management with customers and internal team

1. 輸入、處理並追蹤客戶訂單，並將訂單資料存檔備份。 2. 保持與客戶間之聯繫，回覆e-mail，並確認交貨期。 3. 提供出貨文件，協助業務人員控管出貨，並處理進出口事宜。 4. 定期提供業務銷售狀況報表，以供業務人員或主管參考。 5. 協助業務人員處理銷售業務相關之公司內部行政作業。 6. 協助業務人員整理客戶資料（如：公司基本資料、交易記錄、問題處理狀況）。 7.其他主管交辦事項