Phison Electronics Corp_群聯電子股份有限公司

1. High Speed IO/transceiver circuit designs on DDR4/5 PHY, flash PHY. 2. Power analog circuit designs on PMIC, DC2DC converter, LDO. 3. Analog circuit design on various functional analog IPs like ADC, PLL, DAC

* Analog/Mixed signal IC design & architecture for SerDes, Adaptive Equalizer (CTLE/FFE/DFE), CDR, PLL, PHY, Transmitter, Receiver, RF , wide-band, high frequency amplifier, LNA, TIA, PA * Project example: SATA, USB, PCIe, M-PHY, up to 32Gbps high speed serial & parallel I/O

1.研究及開發SSD架構.2.熟悉CPU架構3.研究CPU效能及應用.4.熟悉SATA/PCIE/Flash介面.5.IC SOC整合.6.IP設計開發和驗證

AE : 1. EVB製作，客戶線路除錯. 2. IC H/W IP Verification. 3. SerDes PHY 特性量測. 4. 協助F/W驗證. 5. 生產Flow除錯與分析. 6. 跨部門溝通與合作 FAE : 1. 客戶端出差支援. (短期為主，一般兩周以內) 2. 平台相容性驗證.

1. 負責multi-lane pcie express控制器設計 2. 驗證PCIe function/feature 3. FPGA is plus 4. 熟UVM is plus

SSD演算法開發與韌體程式撰寫

專攻PCIe Client SSD Project。 1. 參與 PCIe Gen4/5 SSD 的Firmware開發。 2. 參與 SSD Firmware 演算法的設計與開發撰寫。 3. SSD Firmware 架構系統的分析及優化。針對不同設計面向(e.g. 最大效能/最佳能耗比/...)，調整架構開發不同演算法。 4. 開發客製化Firmware。 5. 客戶回報問題分析。

1.高速週邊IO之數位電路開發2.ncverilog程式設計、模擬3.FPGA驗證4.協助IP應用/授權之除錯與驗證 5. Analog modeling

1. 韌體程式設計與開發 2. SSD and NAND flash演算法開發 3. FPGA驗證

1.Characterization of non-volatile memory. 2.Improve the Reliability of non-volatile memory. 3.Design the error handling algorithm for non-volatile memory.

1.固態硬碟(SSD)高性能架構設計與演算法開發 2.固態硬碟(SSD)系統穩定性與負載均衡技術探索

1.Develop error correction code designs (LDPC, BCH, RS, RAID…) and advanced signal processing algorithm for NAND flash storage systems. 2.RTL development for various type of ECC IPs (for PCIe NVMe SSD/SATA SSD/UFS/eMMC/USB applications), digital IC design flow, optimizing hardware architecture to meet PPA requirements to deliver the competitive solutions for all the Phison products. 3.ECC correction strength emulation with C/C++ model and FPGA boards. 4.Collaborate with Project teams on new IC features developments. Collaborate with FW on error recovery flow firmware management.

a. 撰寫SSD韌體 b. 分析Flash 異常問題

1.IP 設計開發和驗證 2.FPGA 設計/合成/驗証 3.Design 及 project 相關 document 的建檔 4.IC設計品質驗證環境開發 5.IC power/area/timing/dft/相關分析 6.IC back-end STA/DC/Formal/CPF 相關經驗 7.CP / FT / 系統除錯 / RMA 分析 8.System integration flow control 9.SSD, USB HUB 系統整合開發

1.熟悉PMIC, 類比電路,高速IO的設計原理與電路特性 2.善用Scope, , measurement instrument進行Debug 3.了解Analog Control Flow協助Analog Designer完成Analog Circuit measurement 4.規劃晶片的驗證時程，並針對各種電路進行分析，確認電路特性符合規範

1.負責車載及嵌入式系統的SSD之產品規格規畫與專案管理 2.負責與內部相關部門溝通合作，完成專案要求事項、產品驗證和達成量產目標 3.擔任RD與策略性客戶間的溝通窗口，負責Design-in階段產品規格討論、技術服務與任務支援。 4.協同業務或協助辦展做產品推廣簡報與規格技術介紹 5.撰寫產品規格書及相關技術文件

1.PCIE/SATA/SD/eMMC/UFS 相關 Host FW 開發&維護 2.Host IC類FW韌體開發 & 驗證 on FPGA/ASIC 3.負責 研發/Lab/客戶/量產端之相關Host應用之技術支援、功能需求規劃、異常分析處理...etc 4.支援國內外客戶開發平台導入

1. 規劃及執行 SSD 控制單元設計。 2. 規劃執行 SSD 韌體之撰寫，並維護量產產品。 3. 執行、協助或配合韌體新技術之研發、導入。 4. 執行 SSD 韌體測試。

Job A: GenAI Solution Engineer Responsibilities: 1. Develop and fine-tune generative AI models (e.g., Llama, Mixtral, Diffusion Models, Multimodal Models) using PyTorch. 2. Integrate domain-specific data into the training process, addressing data preprocessing, augmentation, and labeling needs. 3. Monitor and evaluate model performance using metrics, identifying and resolving issues related to convergence, overfitting, and underfitting. 4. Design and implement training pipelines, ensuring scalability, efficiency, and reproducibility. 5. Collaborate with cross-functional teams to define requirements, evaluate model performance, and optimize training processes. Skills and Tools: 6. Proficiency in Linux, Docker, and familiarity with MLOps is a plus. Skills and Tools: • Deep learning frameworks such as TensorFlow and PyTorch. • Data preprocessing and augmentation techniques. • Feature engineering and model evaluation. • Proficient in Python programming and software engineering. • Data cleaning and visualization. • Expertise in Linux and Docker containerization. • MLOps pipeline design and maintenance. • Version control systems (e.g., Git). • Deep learning hardware acceleration (e.g., GPU). • Strong communication and teamwork skills. ---------------------------------- Job B: GenAI Architecture Engineer Responsibilities: 1. Research state-of-the-art models, staying updated on trends and advancements in the field. 2. Optimize memory and performance during the training and inference processes. 3. Conduct performance analysis related to computation and bandwidth. 4. Familiarity with Linux and Docker is considered an advantage. Skills and Tools: • Research and development of deep learning models and algorithms. • High-performance computing and memory management. • Model compression and optimization techniques. • Proficient in Python programming and scientific libraries. • Experimental design and statistical analysis. • Proficiency in the Linux operating system. • Docker containerization. • GPU-accelerated computing. • Academic research and paper writing. • Strong communication skills and problem-solving abilities. Ensure that your resume highlights these skills and experiences in a professional format with proper formatting and grammar. This will enhance your chances of success in your job applications.

1. 產品SD/eMMC/UFS/SATA/PCIe/USB/TestChip 2. PKG/PCB model extraction 3. IO/PKG/PCB circuit simulation 4. Create layout guide 5. Layout review